applications/engineering

smartsim - Digital logic circuit design and simulation package

Website: http://smartsim.org.uk/
License: GPLv3
Vendor: Fedora Project
Description:
SmartSim is a free and open source digital logic circuit design and
simulation package.

SmartSim lets you create complex circuits by allowing you to create
your own custom components and including them in other circuits, as if
they were any other built-in component. These larger circuits can then
also be included in other designs as sub-components. SmartSim also
offers the ability to print out or export your circuit designs to PDF,
PNG, or SVG.

When you have finished designing your circuit, SmartSim offers an
interactive simulation feature, allowing you to control your circuit
and explore inside sub-components whilst the circuit is
running. SmartSim also allows you to produce logic timing diagrams
from your simulation's activity, which can then be exported to PDF,
PNG, and SVG formats.

Packages

smartsim-1.2.1-1.el6.src [866 KiB] Changelog by Eric Smith (2012-09-04):
- initial version

Listing created by Repoview-0.6.6-1.el6