na4 standard cell family
4-I/P NAND gate
UP
PREV
NEXT
The na4_x1 is a single stage 4-NAND with P/N ratio of about 3. The na4_x4 is a 3 stage 4-NAND with stage efforts of about 1.2 and 3.9.
nq:(i0*i1*i2*i3)'
cell width
power
Generic 0.13um typical timing (ps & ps/fF), pin
i3
.
leakage
dynamic
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
ssxlib013
gates
lambda
0.13um
nW
nW/MHz
PinCap
PropR
RampR
PropF
RampF
na4_x1
2.0
60
3.30
1.16
13.4
4.8f
57
2.97
53
3.62
na4_x4
3.3
100
5.50
2.89
62.5
5.2f
158
0.76
186
0.61
na4_x1
Effort
FO4
Log.
i0
/\
1.88
1.77
¯_
i1
/\
1.88
1.88
¯_
i2
/\
1.78
1.86
¯_
i3
/\
1.68
1.82
¯_
na4_x4
Effort
FO4
Log.
i0
/\
2.94
0.41
¯_
i1
/\
2.87
0.42
¯_
i2
/\
2.77
0.41
¯_
i3
/\
2.66
0.41
¯_
Web data book for the ssxlib. V
dd
=1.2V, T=27°C, nominal process, generic 0.13um technology. Copyright © 2005-2007 Graham Petley. 16 JUL 2007