oan21 standard cell family
2-OR into 2-AND gate
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2 cells with different drive strengths, each with a P:N ratio of about 2. The oan21_x1 has a stage effort of about 1.7 and the oan21_x2 about 2.2.
z:((a1+a2)*b)
cell width
power
Generic 0.13um typical timing (ps & ps/fF), pin
a2
.
leakage
dynamic
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
vxlib013
gates
lambda
0.13um
nW
nW/MHz
PinCap
PropR
RampR
PropF
RampF
oan21_x1
2.3
70
3.85
0.95
22.6
4.7f
83
2.96
116
2.31
oan21_x2
2.3
70
3.85
1.52
35.6
6.4f
85
1.56
117
1.22
oan21_x1
Effort
FO4
Log.
a1
/\
¯_
2.26
a2
/\
¯_
2.12
b
/\
¯_
1.82
oan21_x2
Effort
FO4
Log.
a1
/\
¯_
2.10
a2
/\
¯_
1.95
b
/\
¯_
1.69
Web data book for the vxlib. V
dd
=1.2V, T=27°C, nominal process, generic 0.13um technology. Copyright © 2005-2007 Graham Petley. 28 MAY 2007