no4 standard cell family

4-I/P NOR gate
no4 symbol
The no4_x1 is a single stage 4-NOR with P/N ratio of 1.1. The no4_x4 is a 3 stage 4-NOR with stage efforts of about 1.4 and 3.9.
nq:(i3+i2+i0+i1)' cell width power Generic 0.13um typical timing (ps & ps/fF), pin i1.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
sxlib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
no4_x1 2.0  60 3.30  0.92  13.5  6.2f  65  5.86  51  2.31
no4_x4 3.3 100 5.50 2.66  64.3  6.5f 201  0.74 162  0.57
no4_x1
 
Effort
FO4 Log.
i0 /\ 2.59 2.94
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i1 /\ 2.27 2.91
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i2 /\ 2.81 3.00
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i3 /\ 2.83 2.89
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no4_x1 schematic no4_x1 standard cell layout
no4_x4
 
Effort
FO4 Log.
i0 /\ 3.17 0.49
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i1 /\ 2.84 0.49
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i2 /\ 3.39 0.50
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i3 /\ 3.49 0.49
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no4_x4 schematic no4_x4 standard cell layout