aoi112 standard cell family
2-AND into 3-NOR gate
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1 cell with a P/N ratio of about 2. The function is the same as the
aoi211
, but with the parallel P-transistors next to the output node rather than the VDD connection which gives a slower cell.
z:((c1*c2)+a+b)'
cell width
power
Generic 0.13um typical timing (ps & ps/fF), pin
c2
.
leakage
dynamic
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
wsclib013
gates
lambda
0.13um
nW
nW/MHz
PinCap
PropR
RampR
PropF
RampF
aoi112v0x05
2.0
48
2.64
0.57
9.8
4.2f
58
6.27
55
4.13
aoi112v0x05
Effort
FO4
Log.
a
/\
2.42
2.20
¯_
b
/\
2.31
2.20
¯_
c1
/\
2.07
2.51
¯_
c2
/\
2.04
2.51
¯_
Web data book for the wsclib. V
dd
=1.2V, T=27°C, nominal process, generic 0.13um technology. Copyright © 2005-2007 Graham Petley. 05 JUL 2007