noa22 standard cell family
2-AND into 2-NOR gate
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The noa22_x1 is a single stage AND-OR-Invert with P/N ratio of 1.7 for pins
i0
and
i1
, and about 1.1 for pin
i2
. The noa22_x4 is a 3 stage AND-OR-Invert with stage efforts of about 1.7 and 3.9 for pins
i0
and
i1
, and 1.4 and 3.9 for pin
i2
.
nq:((i0*i1)+i2)'
cell width
power
Generic 0.13um typical timing (ps & ps/fF), pin
i1
.
leakage
dynamic
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
ssxlib013
gates
lambda
0.13um
nW
nW/MHz
PinCap
PropR
RampR
PropF
RampF
noa22_x1
2.0
60
3.30
0.92
14.4
6.3f
53
2.98
45
1.94
noa22_x4
3.3
100
5.50
2.19
56.4
4.1f
176
0.76
165
0.61
noa22_x1
Effort
FO4
Log.
i0
/\
1.61
1.76
¯_
i1
/\
1.58
1.79
¯_
i2
/\
1.64
1.56
¯_
noa22_x4
Effort
FO4
Log.
i0
/\
2.66
0.31
¯_
i1
/\
2.59
0.33
¯_
i2
/\
2.67
0.32
¯_
Web data book for the ssxlib. V
dd
=1.2V, T=27°C, nominal process, generic 0.13um technology. Copyright © 2005-2007 Graham Petley. 16 JUL 2007