no3 standard cell family
3-I/P NOR gate
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The no3_x1 is a single stage 3-NOR with P/N ratio of 1.5. The no3_x4 is a 3 stage 3-NOR with stage efforts of about 1.2 and 3.9.
nq:(i2+i0+i1)'
cell width
power
Generic 0.13um typical timing (ps & ps/fF), pin
i1
.
leakage
dynamic
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
ssxlib013
gates
lambda
0.13um
nW
nW/MHz
PinCap
PropR
RampR
PropF
RampF
no3_x1
1.7
50
2.75
0.81
12.1
5.4f
57
4.59
49
2.29
no3_x4
2.7
80
4.40
2.54
66.0
5.8f
196
0.76
168
0.61
no3_x1
Effort
FO4
Log.
i0
/\
2.07
2.21
¯_
i1
/\
1.82
2.15
¯_
i2
/\
2.18
2.24
¯_
no3_x4
Effort
FO4
Log.
i0
/\
2.96
0.48
¯_
i1
/\
2.82
0.46
¯_
i2
/\
2.56
0.45
¯_
Web data book for the ssxlib. V
dd
=1.2V, T=27°C, nominal process, generic 0.13um technology. Copyright © 2005-2007 Graham Petley. 16 JUL 2007