oan21 standard cell family
2-OR into 2-AND gate
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Minimum drive strength cell with a P/N ratio of about 2 on the output and a stage gain of about 1.6.
z:((a1+a2)*b)
cell width
power
Generic 0.13um typical timing (ps & ps/fF), pin
a2
.
leakage
dynamic
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
wsclib013
gates
lambda
0.13um
nW
nW/MHz
PinCap
PropR
RampR
PropF
RampF
oan21v0x05
2.7
64
3.52
0.59
14.1
2.8f
87
4.97
120
3.98
oan21v0x05
Effort
FO4
Log.
a1
/\
¯_
2.29
a2
/\
¯_
2.20
b
/\
¯_
1.83
Web data book for the wsclib. V
dd
=1.2V, T=27°C, nominal process, generic 0.13um technology. Copyright © 2005-2007 Graham Petley. 05 JUL 2007