na2 standard cell family
2-I/P NAND gate
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The na2_x1 is a single stage 2-NAND with P/N ratio of 1.7. The na2_x4 is a 3 stage 2-NAND with stage efforts of about 0.9 and 3.9.
nq:(i0*i1)'
cell width
power
Generic 0.13um typical timing (ps & ps/fF), pin
i1
.
leakage
dynamic
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
sxlib013
gates
lambda
0.13um
nW
nW/MHz
PinCap
PropR
RampR
PropF
RampF
na2_x1
1.3
40
2.20
0.69
10.0
4.9f
50
2.97
36
1.84
na2_x4
2.3
70
3.85
2.43
62.9
5.7f
158
0.74
139
0.57
na2_x1
Effort
FO4
Log.
i0
/\
1.36
1.43
¯_
i1
/\
1.28
1.35
¯_
na2_x4
Effort
FO4
Log.
i0
/\
2.21
0.41
¯_
i1
/\
2.33
0.44
¯_
Web data book for the sxlib. V
dd
=1.2V, T=27°C, nominal process, generic 0.13um technology. Copyright © 2005-2007 Graham Petley. 08 JUL 2007