ha2 standard cell family

2-I/P half adder
ha2 symbol
2 I/P half adder with carry and sum outputs.
co:(a*b) cell width power Generic 0.13um typical timing (ps & ps/fF), pin a.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
vsclib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
ha2v0x2 4.0  96 5.28 2.15  57.1  8.7f  78  2.14  88  1.67
so:(a^b) cell width power Generic 0.13um typical timing (ps & ps/fF), pin a.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
vsclib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
ha2v0x2 4.0  96 5.28 2.15  48.8  8.7f 120  2.39 140  1.82
ha2v0x2
 
Effort
FO4 Log.
a /\ 3.31 2.18
¯_ 2.47
b /\ 3.39 2.17
¯_ 2.53
ha2v0x2 schematic ha2v0x2 standard cell layout