nd3 standard cell family
3-I/P NAND gate
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x2
drive strength cell with a P/N ratio of about 3.4.
z:(a*b*c)'
cell width
power
Generic 0.13um typical timing (ps & ps/fF), pin
c
.
leakage
dynamic
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
vgalib013
gates
lambda
0.13um
nW
nW/MHz
PinCap
PropR
RampR
PropF
RampF
nd3v0x2
2.7
64
3.52
1.11
12.7
4.9f
48
2.27
47
2.83
nd3v0x2
Effort
FO4
Log.
a
/\
1.57
1.51
¯_
b
/\
1.49
1.51
¯_
c
/\
1.39
1.45
¯_
Web data book for the vgalib. V
dd
=1.2V, T=27°C, nominal process, generic 0.13um technology. Copyright © 2005-2007 Graham Petley. 06 JUL 2007