o2 standard cell family
2-I/P OR gate
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2 I/P OR gate with a stage effort of about 2.2 for the o2_x2 and about 4.4 for the o2_x4.
q:(i0+i1)
cell width
power
Generic 0.13um typical timing (ps & ps/fF), pin
i1
.
leakage
dynamic
tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
ssxlib013
gates
lambda
0.13um
nW
nW/MHz
PinCap
PropR
RampR
PropF
RampF
o2_x2
1.7
50
2.75
1.27
30.3
5.0f
83
1.52
116
1.22
o2_x4
2.0
60
3.30
1.96
46.5
4.8f
101
0.76
148
0.62
o2_x2
Effort
FO4
Log.
i0
/\
¯_
1.97
i1
/\
¯_
1.81
o2_x4
Effort
FO4
Log.
i0
/\
¯_
2.12
i1
/\
¯_
1.96
Web data book for the ssxlib. V
dd
=1.2V, T=27°C, nominal process, generic 0.13um technology. Copyright © 2005-2007 Graham Petley. 16 JUL 2007